Going 64 bit

Michael Torrie torriem at chem.byu.edu
Fri Jan 26 19:08:22 MST 2007


On Fri, 2007-01-26 at 17:23 -0700, Nicholas Leippe wrote:
> On Friday 26 January 2007 16:43, Bryan Sant wrote:
> 
> > The x86_64 instruction set, is a true RISC-based, 64-bit, instruction set
> 
> While it is a 'true' 64-bit processor, it still does not have a RISC-based 
> isa.  It remains a CISC isa.  See: http://sandpile.org/aa64/index.htm

Sure, but this doesn't matter anymore.  Let's face it.  They used to say
RISC was the wave of the future.  And they were partially right.  But
now the gap between RISC and CISC is narrowed significantly.  Most x86
chips (AMD or Intel) are really RISC cores with a microcode translator
that converts the more compact CISC instruction sequences into RISC
microcode where it is pipelined, reordered, etc.  This gives all the
advantages of RISC without having to actually force RISC ISA on the
compilers and programmers.  In effect this means the RISC never really
panned out like everyone thought it would at the higher level.  x86_64
has the advantage of having about twice the code density of a 64-bit
instruction word 64-bit RISC processor.  And even though memory and disk
space is cheap, this higher density pays off in terms of increased cache
performance.

On the flip side, the x86 ISA, 64-bit or not, is old, bloated, and full
of strange anachronisms like memory segmentation and "real mode"
garbage.  It's likely you can still boot MS-DOS on an AMD 64-bit
machine.  However the x86_64 extensions do give us a path forward and
perhaps future cpus can drop support for older things like real mode, 16
and 32-bit instructions.  Who knows.

Michael


> 
> (There are many definitions for processor width, so 'true' is subjective. But 
> the x86_64 probably satisfies it in most of the ways you could define it.)
> 
> 
> /*
> PLUG: http://plug.org, #utah on irc.freenode.net
> Unsubscribe: http://plug.org/mailman/options/plug
> Don't fear the penguin.
> */
> 




More information about the PLUG mailing list